The inventive concept relates to semiconductor packages, and more particularly, to a multi-layered semiconductor package that can be manufactured at low cost within a preset form factor, and a method of manufacturing the multi-layered semiconductor package.
In general, a packaging process is performed on semiconductor chips formed by performing several semiconductor processes on a wafer, thereby forming a semiconductor package. Such semiconductor packages may be classified into two categories: a single-layer semiconductor package in which a single semiconductor chip is stacked by flip-chip bonding, and a multi-layered semiconductor package in which a plurality of semiconductor chips are stacked by wire bonding or through silicon vias (TSVs). Recently, semiconductor packages have been more highly integrated, and also have been continuously required to provide high reliability, process simplification, a small form factor, cost effectiveness, and the like.